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Pattern Generators

Showing all 10 results


  • The Analysis Needed to Find the Source of Bit Errors

    • Built-in clock source for extremely accurate timing
    • Q-factor measurement to swiftly analyze the vertical eye opening in terms of BER
    • Differential and single-ended I/O ensuring connectivity for a variety of communications bus standards
    • BER contour with automatic mask creation to measure and view the eye diagram opening as a function of BER
    • Error mapping provides you with the debugging support to identify the cause and location of signaling errors
    • Forward error correction emulation for built-in verification of FEC performance on your communication system design

     

    Models Max Bit Rate
    BA1500 Pattern Generator and Error Analyzer 1.5 Gb/s
    BA1600 Pattern Generator and Error Analyzer 1.6 Gb/s

     

    REQUEST A QUOTE
  • The Analysis Needed to Find the Source of Bit Errors

    • Built-in clock source for extremely accurate timing
    • Q-factor measurement to swiftly analyze the vertical eye opening in terms of BER
    • Differential and single-ended I/O ensuring connectivity for a variety of communications bus standards
    • BER contour with automatic mask creation to measure and view the eye diagram opening as a function of BER
    • Error mapping provides you with the debugging support to identify the cause and location of signaling errors
    • Forward error correction emulation for built-in verification of FEC performance on your communication system design

     

    Models Max Bit Rate
    BA1500 Pattern Generator and Error Analyzer 1.5 Gb/s
    BA1600 Pattern Generator and Error Analyzer 1.6 Gb/s

     

    REQUEST A QUOTE
    • Pattern Generation and Error Analysis, High-speed BER Measurements up to 28.6 Gb/s
    • Fast Input Rise Time / High Input Bandwidth Error Detector for Accurate Signal Integrity Analysis
    • Physical Layer Test Suite with Mask Testing, Jitter Peak, BER Contour, and Q-factor Analysis for Comprehensive Testing with Standard
    • Integrated Eye Diagram Analysis with BER Correlation
    • Optional Jitter Map Comprehensive Jitter Decomposition – with Long Pattern (i.e. PRBS-31) Jitter
    • Patented Error Location Analysis™ enables Rapid Understanding of your BER Performance Limitations and
    • Assess Deterministic versus Random Errors, Perform Detailed Pattern-dependent Error Analysis, Perform Error Burst Analysis, or Error-free Interval Analysis

     

    Models Max Bit Rate
    BSA125C Bit Error Ratio Analyzer 12.5 Gb/s
    BSA175C Bit Error Ratio Analyzer 17.5 Gb/s
    BSA286CL Bit Error Ratio Analyzer 28.6 Gb/s

     

    REQUEST A QUOTE
    • Pattern Generation and Error Analysis, High-speed BER Measurements up to 28.6 Gb/s
    • Fast Input Rise Time / High Input Bandwidth Error Detector for Accurate Signal Integrity Analysis
    • Physical Layer Test Suite with Mask Testing, Jitter Peak, BER Contour, and Q-factor Analysis for Comprehensive Testing with Standard
    • Integrated Eye Diagram Analysis with BER Correlation
    • Optional Jitter Map Comprehensive Jitter Decomposition – with Long Pattern (i.e. PRBS-31) Jitter
    • Patented Error Location Analysis™ enables Rapid Understanding of your BER Performance Limitations and
    • Assess Deterministic versus Random Errors, Perform Detailed Pattern-dependent Error Analysis, Perform Error Burst Analysis, or Error-free Interval Analysis

     

    Models Max Bit Rate
    BSA125C Bit Error Ratio Analyzer 12.5 Gb/s
    BSA175C Bit Error Ratio Analyzer 17.5 Gb/s
    BSA286CL Bit Error Ratio Analyzer 28.6 Gb/s

     

    REQUEST A QUOTE
  • Features

    Benefits

    Pattern Generation on up to four pattern-independent channels. Supports multi-lane standards such as 100 GbE. Create victim/aggressor patterns for crosstalk testing. Multi-level signaling testing and parallel testing can reduce rest time over serial pattern generation solutions.
    30, 32, and 40 Gb/s data rate Pattern Generation configurations. Provides the speed to address fast growing markets such as 100 GbE, CEI, 32G Fibre Channel and DP-QPSK.
    Built-in sine, random, BUJ and PJ jitter insertion capability. A full complement of jitter sources covers a broad array of receiver test requirements.

     

    REQUEST A QUOTE
  • Features

    Benefits

    Pattern Generation on up to four pattern-independent channels. Supports multi-lane standards such as 100 GbE. Create victim/aggressor patterns for crosstalk testing. Multi-level signaling testing and parallel testing can reduce rest time over serial pattern generation solutions.
    30, 32, and 40 Gb/s data rate Pattern Generation configurations. Provides the speed to address fast growing markets such as 100 GbE, CEI, 32G Fibre Channel and DP-QPSK.
    Built-in sine, random, BUJ and PJ jitter insertion capability. A full complement of jitter sources covers a broad array of receiver test requirements.

     

    REQUEST A QUOTE
  • Features

    Benefits

    Pattern Generation on up to four pattern-independent channels. Supports multi-lane standards such as 100 GbE. Create victim/aggressor patterns for crosstalk testing. Multi-level signaling testing and parallel testing can reduce rest time over serial pattern generation solutions.
    30, 32, and 40 Gb/s data rate Pattern Generation configurations. Provides the speed to address fast growing markets such as 100 GbE, CEI, 32G Fibre Channel and DP-QPSK.
    Built-in sine, random, BUJ and PJ jitter insertion capability. A full complement of jitter sources covers a broad array of receiver test requirements.

     

    REQUEST A QUOTE
  • Features

    Benefits

    Pattern Generation on up to four pattern-independent channels. Supports multi-lane standards such as 100 GbE. Create victim/aggressor patterns for crosstalk testing. Multi-level signaling testing and parallel testing can reduce rest time over serial pattern generation solutions.
    30, 32, and 40 Gb/s data rate Pattern Generation configurations. Provides the speed to address fast growing markets such as 100 GbE, CEI, 32G Fibre Channel and DP-QPSK.
    Built-in sine, random, BUJ and PJ jitter insertion capability. A full complement of jitter sources covers a broad array of receiver test requirements.

     

    REQUEST A QUOTE
  • Features

    Benefits

    Pattern Generation on up to four pattern-independent channels. Supports multi-lane standards such as 100 GbE. Create victim/aggressor patterns for crosstalk testing. Multi-level signaling testing and parallel testing can reduce rest time over serial pattern generation solutions.
    30, 32, and 40 Gb/s data rate Pattern Generation configurations. Provides the speed to address fast growing markets such as 100 GbE, CEI, 32G Fibre Channel and DP-QPSK.
    Built-in sine, random, BUJ and PJ jitter insertion capability. A full complement of jitter sources covers a broad array of receiver test requirements.

     

    REQUEST A QUOTE
  • Features

    Benefits

    Pattern Generation on up to four pattern-independent channels. Supports multi-lane standards such as 100 GbE. Create victim/aggressor patterns for crosstalk testing. Multi-level signaling testing and parallel testing can reduce rest time over serial pattern generation solutions.
    30, 32, and 40 Gb/s data rate Pattern Generation configurations. Provides the speed to address fast growing markets such as 100 GbE, CEI, 32G Fibre Channel and DP-QPSK.
    Built-in sine, random, BUJ and PJ jitter insertion capability. A full complement of jitter sources covers a broad array of receiver test requirements.

     

    REQUEST A QUOTE

Showing all 10 results